Reliable DRC voltage text annotation means faster and more accurate DRC verification

As the potential for complex interactions between tension domains increases significantly with increasing design density at each new process node, the complexity of spacing checks in design rule checking (DRC) increases also. To minimize these types of risks, many simple spacing controls have evolved into voltage-sensitive DRC (VA-DRC) controls that incorporate voltage values ​​to determine the required spacing between geometries. [1,2]. To enable a DRC tool to properly apply VA-DRC, the VA-DRC methodology requires circuit designers to create voltage text in their design diagrams. However, creating these texts manually (usually using marker layers) is time consuming and prone to human error, and even the smallest errors can create a large number of false DRC errors which are very difficult to debug.

Fig. 1: Textual annotations of the DRC voltage.

A robust automated methodology is needed to enable integrated circuit (IC) design companies to ensure DRC-specific designs while meeting their out-of-band schedules. Additionally, a DRC tool running VA-DRC should be able to automatically embed these text annotations into the DRC stream, which removes the ruleset’s dependency on manual marker layers when running VA-DRC. DRC. For example, when developing their rule sets, many foundries are now leveraging the Caliber nmDRC platform’s ability to use text annotations in the design layout to identify different voltages, moving away from the need to manual marker layers.

Voltage Text Annotation and Verification

Caliber PERC’s automated text annotation process can not only generate text annotations, but also check existing text annotations for errors and conflicts to ensure design consistency. Correcting these text annotations before tapeout is critical, as it is impossible to trace all of the tension text that exists in a design layout when performing DRC signing, as multiple texts may exist at different levels of hierarchy in different intellectual property (IP) content.

When a network is already annotated with voltage information, engineers must ensure that this information is unique and accurate. Caliber PERC Wrapped Checks provide two pre-coded text annotation verification processes:

  • find and report all text “collisions” (multiple text annotations with different values) before voltage propagation is run
  • compare text annotations with voltage propagation results to identify discrepancies

The text collision check reviews all existing text annotations in the design (Figure 2). If multiple text annotations with different values ​​are found on the same network, a text collision is reported. All information needed to allow engineers to easily identify deviations is reported.

Fig. 2: Text collision checking detects and flags text annotation conflicts before stress propagation.

As shown in Figure 3, the text collision check found 798 text annotations for 1.8V and one conflicting text annotation for 3.3V, all for network 28 in layer M1_B. After voltage propagation, the correct voltage for this network is determined to be 1.8 V. With this information, engineers can easily highlight the 3.3 V text annotation and remove it from the database.

Fig. 3: A check of the text annotations on thread 28 reveals an annotation with a value of 3.3V. Once voltage propagation has confirmed that the correct voltage for the grid is 1.8V, this annotation can be removed.

Automated text annotation

Caliber PERC Wrapped Checks [3,4] use unique voltage propagation capability [5] Caliber PERC reliability platform to automatically detect the precise tension for each thread and create annotation text in the layout at the desired metal level (Figure 4), as a layout text file on page. The layout hierarchy is respected and annotation texts are created at the lowest possible hierarchy.

Fig. 4: The Caliber VA-DRC stream accurately detects and annotates the net tension, then uses this annotation to apply the appropriate VA-DRC spacing controls.

The generated voltages are created using a layout text declaration in the Caliber Standard Verification Rules Format (SVRF). This text file can then be included in any DRC rules file to run DRC directly, or used with the Caliber DESIGNrev interface to add these texts directly to the layout database.


Accurate and repeatable reliability verification is now essential for advanced node IC designs and for increasingly complex products fabricated on established nodes. VA-DRC is an essential component of integrated circuit reliability verification and relies on accurate voltage textual annotations. The accuracy of VA-DRC is necessary to achieve the high reliability and high efficiency that contribute to market success. By leveraging the power of Caliber PERC bulk checks and automated text annotation in conjunction with the Caliber nmDRC platform, designers can run VA-DRC checks with confidence in the results, no matter how complex. design or process node. Automated text generation and verification flow provides all necessary design annotations, along with guidance to help engineers correct inaccurate or conflicting voltage information, to ensure successful DRC execution with turnaround time fast for voltage-sensitive spacing rules.


  1. Matthew Hogan. “Perc Caliber Voltage-Sensitive DRC Delivers Rigorous Accuracy for Today’s Complex Designs”, Siemens Digital Industries Software. December 2018.
  2. Dina Medhat, “Automated Solution for Voltage-Sensitive DRC,” EE Times, SOC DesignLines. December 23, 2015.
  3. Reliability platform Caliber PERC, Siemens Digital Industries Software. September 2017.
  4. Hossam Sarhan “Configurable, Easy-to-Use and Packaged Reliability Checks”, Siemens Digital Industries Software. March 2019.
  5. Dina Medhat. “Integrated Circuit Reliability Failure Protection with Automated Voltage Propagation,” Siemens Digital Industries Software, July 2017.

Abdallah Bakhali

Abdallah Bakhali

(All posts)

Abdellah Bakhali is an advanced product engineer in the Caliber Design Solutions division of Siemens Digital Industries Software, supporting the Caliber PERC reliability platform. His current work focuses on circuit reliability verification and IO ring verification strategies. Prior to joining Siemens, Bakhali held various design engineering positions within Arm, focusing on I/O library development. He holds an engineering degree in electrical engineering from the National Institute of Applied Sciences (INSA) in Lyon.